Porting U-boot to Powerpc processor

Example Processor: MPC 8548.

Understand the anatomy & flow of processor & its core.

• MPC 8548 is based on E500

• General Overview of E500(User point of view):-

• 32 bit processor based on Powerpc BOOKE (i.e uses lower 32 bit of 64 bit)
• 5 stage pipeline; Instruction fetch, Decode,Execution,Writeback and completion
• Execution unit is further subdivided in 3 stage pipeline and has Simple Units (SU1 & SU2),Multiple unit(MU) and Branch Perdiction units.
• Also has Instruction fetch queues, Branch target Buffers, Completion Queues etc.,
• Internal bus is CCB (Complex Core Bus; Both data & address)
• At maximum 2 Instruction/Cycle can be completed.
• E500, does have MMU:-
• -32 Kbyte Instruction & Data L1 Cache.
• -64 (4kpage)/4 entry Instruction & Data L1 MMU
• -256/16 entry Instruction & Data L2 MMU.
• E500, On reset fetches the instruction from specific location 0xFFFF_FFFC.
• Default entry for 4K Boot Page.
• ->Pipeline Flow: IF->DEC->EXEC->WB->COM
• E500 core has two modes for programming-Supervisor and General programming mode.
• Register groups of GP - 32 GPR, 7 SPRs, Condition Registers(CR), Count Registers (CTR), Link Registers(LR), otherslike (Performance registers etc).
• Register groups of Supervisor mode- Reg group of GP, Memory Address Select Registrs(MAS0-7), Interrupt vector Offset Register(IVOR0-IVOR35), Tnterrupt Prefix registers(IVPR), Timer Registers, Machine state Reg(MSR), Hardware implementation Registers(HID0&1).
• Significant Interupts - critical, machine check, Data storage, External input, alignment, programm interrupt offset, floating point, syscall, decrementer, fixed interval timer, watch dog timer, Data&Instruction TLB, and Debug interrupt.
• MMU address translation:-
• -41 bit virt address(1AS+8PiD+20EP+12BYTE ADDRESS)->L1 MMU->[if L1 missed, L2-MMU]->32bit Real_address(20 RPN + 12 Byte Address).

General blocks of Processor

• Ofcourse, e500 core.
• DDR controller
• Local Bus Controller
• eTsecs.
• UARTS
• PICs
• 1 MB CCSRBAR (Internal memory mapped registers)
• PCI Xpress, Pci 66Mhx, Pci-x 133 Mhz controllers
• Rapid I/Os.
• 4 channel DMA controllers.
• 512K L2 Cache/SRAM.

Porting Uboot
Uboot is organised as boards and CPU on which the board is based, so following is the important
folders that has to be taken care while porting
1. board/freesacle/

• init.s (lowlevel initialization)
• *,lds file (Loader Script)

2. include/configs/.

• Config macros for boot and hardware configurations

3. cpu/mpc8548xx/

• start.S (startup- Core initialization and stack creation)
• resetvector.S(Jump to 4k boot page)

4. lib_ppc/

• board.c (all controller initialization, console buffers & inits, driver inits & relocations )

There are other files too.. but these file are major players!

Important Data Structure:-
1. gd_t (Global data structure) in include/asm-/global_data.h

• has bd_t (board_descriptor structure).
• Fields to hold clocks of various controller(pci_clk, mem_clk, bus_Clk, cpu_clk...).
• Fields to hold baud rate etc...
• Fileds for env_address, check_sum fild (env_valid), have_Console(condition byte)
• Jump table pointers.

2. bd_t (board descriptors structure) in include/asm-/u-boot.h

• Usually has the fields for start of DRAM memory, flash_start, flash_size, immr_base address, bootflags, clock freq of controllers,etc.,

U-boot flow (based on MPC8548):
1. Jump from reset vector(FFFF_FFFC) to 4K boot page (start.S) with in the FLASH
2. start.s (goal is to setup the initial stack and jump to c routine for flexible initialization)
[Code is in flash.]

• enable/invalidate the caches.
• set the Interrupt vectors to fall with in the 4k page.
• Increase the boot window to 4M(0xFFC0_0000) with in the flash by adding an entry to TLB.
• Allocate initial RAM in Dcache.
  
• Jump to the new address in flash.
• Create an initial stack in Dcache. (Till here assembly code)
• Jump to c routine(cpu_early_init_f).

3. cpu_initialization

• Initialize the clock, LAWBARS, DDRControllers, Local Bus Controllers.
• Add entries to TLBs for all DRAM, PCI, FLASH, etc...
• returns back to start.s from where board initialization is called.

We are still in Flash

4. board initialization from FLASH

• see lib_ppc/board.c.
• Routines in init_sequence array are called. Most commonly env_init, console_buufer, serial_init, dpram_init , init_time_base etc...
• Now SDRAM is available.
• Reserve area for u-boot, data & bss, IVPR, Global descriptor,and malloc (Top down approach)
• Create a bigger stack
• Relocate the u-boot code, data, bss,ivpr to RAM
• Clear the bss, initialize the data pointer and call board_initialization from RAM (board_init_r)

5. board initialization from RAM

• all driver initialization takes place like pci_init, ethernet_init, etc.,
• also, command table is relocated manually to ram.
• Jump_table is initialized.
• u-boot prompt is displayed.

Booting the linux

• bootm command is used to boot linux which is in common/cmd_bootm.c.
• bootm command format is
• bootm
• command uncompresses and validates the images by process the headers
• After validation uboot jumps to the kernel, its wortnoting to see the sequence before jumping to kernel(I am using linux) in function do_bootm_linux() in [cmdline, bd_t... are handled].

ABI Info for Powerpc

• R1: stack pointer
• R2: reserved for system use
• R3-R4: parameter passing and return values
• R5-R10: parameter passing
• R13: small data area pointer
• R30: GOT pointer
• R31: frame pointer