- Here are some of Powerpc instructions. Good articles on PPC assembly in the following link; I got this listing from this article ....
- http://www.ibm.com/developerworks/library/l-powasm1.html
- li REG, VALUE
loads register REG with the number VALUE
- add REGA, REGB, REGC
adds REGB with REGC and stores the result in REGA
- addi REGA, REGB, VALUE
add the number VALUE to REGB and stores the result in REGA
- mr REGA, REGB
copies the value in REGB into REGA
- or REGA, REGB, REGC
performs a logical "or" between REGB and REGC, and stores the result in REGA
- ori REGA, REGB, VALUE
performs a logical "or" between REGB and VALUE, and stores the result in REGA
- and, andi, xor, xori, nand, nand, and nor
all of these follow the same pattern as "or" and "ori" for the other logical operations
- ld REGA, 0(REGB)
use the contents of REGB as the memory address of the value to load into REGA
- lbz, lhz, and lwz
all of these follow the same format, but operate on bytes, halfwords, and words, respectively (the "z" indicates that they also zero-out the rest of the register)
- b ADDRESS
jump (or branch) to the instruction at address ADDRESS
- bl ADDRESS
subroutine call to address ADDRESS
- cmpd REGA, REGB
compare the contents of REGA and REGB, and set the bits of the status register appropriately
- beq ADDRESS
branch to ADDRESS if the previously compared register contents were equal
- bne, blt, bgt, ble, and bge
all of these follow the same form, but check for inequality, less than, greater than, less than or equal to, and greater than or equal to, respectively.
- std REGA, 0(REGB)
use the contents of REGB as the memory address to save the value of REGA into
- stb, sth, and stw
all of these follow the same format, but operate on bytes, halfwords, and words, respectively
- sc
makes a system call to the kernel
Wednesday, October 21, 2009
Useful Powerpc Instructions
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